Chris, "Logically", the following things need setting up on the L1 board. 1) The 3 routing chips must be programmed (24 channels total x 6 bits each) 2) The 6 Prescale chips must be loaded (24 channels total x 24 bits each) 3) The CPU trigger register must be set (8 bits) 4) The CPU inhibit register must be set (8 bits) 5) The Bunch Bypass Register must be set (1 bit) 6) The Serial Control resister needs to be set in each of the 8 trigger lookup chips (24 bits each). 7) The Serial Control register needs to be set in the (one) bunch-finder chip (64 bits). General comments: Chips are addressed using the chip-select (CHIPSEL) register, and channels within a chip are selected using the SELCHAN register. These must be set for the appropriate chip/channel prior to calling any reading/writing routines for the actual channel contents. The CHIPSEL value and number of channels for each chip are shown below. for example, to program Route-3, set CHIPSEL to 0xB and loop SELCHAN from 0 to 7. CHIPSEL Name ----------|--------------- 1 1 TA-1 2 2 TA-2 3 3 TA-3 4 4 TA-4 5 5 TB-1 6 6 TB-2 7 7 TC-1 8 8 TC-2 9 9 Route-1, 8 channels(7..0) = (trig lines 7..0) 10 A Route-2, 8 channels(7..0) = (trig lines 15..8) 11 B Route-3, 8 channels(7..0) = (trig lines 23..16) 12 C Pre-Scaler-1, 4 channels(3..0) = (trig lines 3..0) 13 D Pre-Scaler-2, 4 channels(3..0) = (trig lines 7..4) 14 E Pre-Scaler-3, 4 channels(3..0) = (trig lines 11..8) 15 F Pre-Scaler-4, 4 channels(3..0) = (trig lines 15..12) 16 10 Pre-Scaler-5, 4 channels(3..0) = (trig lines 19..16) 17 11 Pre-Scaler-6, 4 channels(3..0) = (trig lines 23..20) 18 12 Scaler-1, 4 channels(3..0) = (trig lines 3..0) 19 13 Scaler-2, 4 channels(3..0) = (trig lines 7..4) 20 14 Scaler-3, 4 channels(3..0) = (trig lines 11..8) 21 15 Scaler-4, 4 channels(3..0) = (trig lines 15..12) 22 16 Scaler-5, 4 channels(3..0) = (trig lines 19..16) 23 17 Scaler-6, 4 channels(3..0) = (trig lines 23..20) 24 18 Bunch-finder The CHIPSEL and SELCHAN registers are set with member functions: inline void SetChip(UINT32 chip); inline UINT32 GetChip(); and inline void SetChan(UINT32 chan); inline UINT32 GetChan(); 1) Routing Chips: Each of the 3 route chips has 8 channels (0-7) that needs a 6 bit value loaded. **These chips are special in that bits [29..24] of the databus are used (hardware reasons). i.e. before loading a six bit number it should be left-shifted 24 bits DATA = IN<<24; and similarly after reading, the value should be shifted right by 24 and the six lowest bits masked DATA = (OUT>>24)&0x3F; (The other chips dont have this "feature"). Member functions used: inline void SetRouteRegister(UINT32 value); inline UINT32 GetRouteRegister(); 2) Prescale Chips: Each of the 6 prescale chips has 4 channels that need a 24 bit value loaded. Member functions used: inline void SetPrescaleRegister(UINT32 value); inline UINT32 GetPrescaleRegister(); 3) CPU Accept Register: One 8-bit word. Member functions used: inline void SetCpuTriggerRegister(UINT32 value); inline UINT32 GetCpuTriggerRegister(); 4) CPU Inhibit Register: One 8-bit word. Member functions used: inline void SetCpuInhibitRegister(UINT32 value); inline UINT32 GetCpuInhibitRegister(); 5) Bunch Bypass Register: One 1-bit word. Member functions used: inline void SetBunchBypassRegister(UINT32 value); inline UINT32 GetBunchBypassRegister(); 6) Each of the 8 trigger lookup chips (CHIPSEL 1-8) can be further "customized" by a 24 bit internal register that is written by a special serial bus I invented (to save pins). The code takes care of serializing the data, so all you have to do is call the proper routines. Member functions used (comments from header file included): void SetSerial(int chip, char *bitarray, int numbits); void GetSerial(int chip, char *bitarray, int numbits); (you may want to look at the L1test.cxx code to see how I use the above routines). 7) The 64 bit Serial Control resister needs to be set in the bunch-finder chip. This is done with the same routines in item 6 above, the only difference being the chip number (CHIPSEL = 0x18) and the "numbits" argument. =========================================== I hope this makes some sense. Cheers, Mats